20231227在Firefly的AIO-3399J开发板的Android11下配置单后摄像头ov13850
2023/12/27 10:26
1、简略步骤：
rootroot@rootroot-X99-Turbo:~/3TB$ cat Android11.0.tar.bz2.a* > Android11.0.tar.bz2
rootroot@rootroot-X99-Turbo:~/3TB$ tar jxvf Android11.0.tar.bz2
rootroot@rootroot-X99-Turbo:~/3TB$ mv Android11.0 61Android11.0
rootroot@rootroot-X99-Turbo:~/3TB$ cd 61Android11.0
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$ cd u-boot
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/u-boot$ ll
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/u-boot$
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/u-boot$ ./make.sh rk3399
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/u-boot$
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/u-boot$ cd ..
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$ ll
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$ cd kernel/
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/kernel$ ll
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/kernel$
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/kernel$ make ARCH=arm64 rockchip_defconfig android-11.config -j36
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/kernel$ ll
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/kernel$
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/kernel$ make ARCH=arm64 BOOT_IMG=../rockdev/Image-rk3399_Android11/boot.img rk3399-sapphire-excavator-edp-avb.img -j36
scripts/kconfig/conf --syncconfig Kconfig
WRAP arch/arm64/include/generated/uapi/asm/errno.h
WRAP arch/arm64/include/generated/uapi/asm/ioctls.h
WRAP arch/arm64/include/generated/uapi/asm/ioctl.h
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/kernel$ ll
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0/kernel$ cd ..
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$ ll
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$ source build/envsetup.sh
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$ lunch
42. rk3399_Android11-userdebug
Which would you like? [aosp_arm-eng] 42
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$ ll
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$ make -j36
rootroot@rootroot-X99-Turbo:~/3TB/61Android11.0$ ./build.sh -u
2、拷贝Firefly的AIO-3399J开发板的Android10的SDK中的Firefly的DTS文件：
Z:\AIO-3399J\rk3399_Android10.0\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\Makefile
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-android.dtsi
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-dram-default-timing.dtsi
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-firefly-aio.dts
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-firefly-aio.dtsi
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-firefly-core.dtsi
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-firefly-demo.dtsi
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-firefly-port.dtsi
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-opp.dtsi
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-sched-energy.dtsi
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399-vop-clk-set.dtsi
Z:\rk3399_Android10.0\kernel\arch\arm64\boot\dts\rockchip\rk3399.dtsi
3、使用Firefly的AIO-3399J开发板的Android10的DTS的修改：
N:\AIO-3399J\11\OV13850\64rk3399-android-11\kernel\arch\arm64\boot\dts\rockchip\rk3399-firefly-aio.dtsi
&i2c1 {
status = "okay";
tc358749x: tc358749x@0f {
compatible = "toshiba,tc358749x";
#sound-dai-cells = <0>;
reg = <0x0f>;
power-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
int-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hdmiin_gpios>;
status = "disabled";
};
xc7160b: xc7160b@1b {
status = "okay";
};
xc7160f: xc7160f@1b {
status = "okay";
};
ov13850b: ov13850b@10 {
status = "okay";
avdd-supply = <&vcc_mipi>;
power-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
};
ov13850f: ov13850f@10 {
status = "okay";
avdd-supply = <&vcc_mipi>;
power-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
};
};
修改为：
&i2c1 {
status = "okay";
tc358749x: tc358749x@0f {
compatible = "toshiba,tc358749x";
#sound-dai-cells = <0>;
reg = <0x0f>;
power-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
int-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hdmiin_gpios>;
status = "disabled";
};
xc7160b: xc7160b@1b {
status = "okay";
};
xc7160f: xc7160f@1b {
status = "okay";
};
ov13850: ov13850@10 {
status = "okay";
avdd-supply = <&vcc_mipi>;
power-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
};
//ov13850b: ov13850b@10 {
// status = "okay";
// avdd-supply = <&vcc_mipi>;
// power-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
// reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
// pwdn-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
//};
//
//ov13850f: ov13850f@10 {
// status = "okay";
// avdd-supply = <&vcc_mipi>;
// power-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
// reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
// pwdn-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
//};
};
N:\AIO-3399J\11\OV13850\64rk3399-android-11\kernel\arch\arm64\boot\dts\rockchip\rk3399-firefly-port.dtsi
&i2c1 {
status = "okay";
i2c-scl-rising-time-ns = <300>;
i2c-scl-falling-time-ns = <15>;
clock-frequency = <400000>;
es8323: es8323@10 {
compatible = "everest,es8323";
reg = <0x10>;
spk-ctl-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
clock-names = "mclk";
clocks = <&cru SCLK_I2S_8CH_OUT>;
pinctrl-names = "default";
pinctrl-0 = <&i2s_8ch_mclk>;
#sound-dai-cells = <0>;
extcon = <&rk_headset>;
status = "disabled";
};
rt5640: rt5640@1c {
#sound-dai-cells = <0>;
compatible = "realtek,rt5640";
reg = <0x1c>;
clocks = <&cru SCLK_I2S_8CH_OUT>;
clock-names = "mclk";
realtek,in1-differential;
pinctrl-names = "default";
pinctrl-0 = <&i2s_8ch_mclk>;
//hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
//hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
io-channels = <&saradc 4>;
hp-det-adc-value = <500>;
status = "okay";
};
gti5801: gti5801@60 {
compatible = "gyrfalcon,spr5801";
reg = <0x60>;
status = "disabled";
};
vm149c: vm149c@0c {
compatible = "silicon touch,vm149c";
status = "okay";
reg = <0x0c>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
};
ov13850b: ov13850b@10 {
compatible = "ovti,ov13850";
status = "disabled";
reg = <0x10>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>; /* VCC28_MIPI */
//dovdd-supply = <&vcc_mipi>; /* VCC18_MIPI */
//dvdd-supply = <&dvdd_1v2>; /* DVDD_1V2 */
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-CT0116";
rockchip,camera-module-lens-name = "Largan-50013A1";
lens-focus = <&vm149c>;
port {
ucam_out0: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
data-lanes = <1 2>;
};
};
};
vm149c_front: vm149c_front@0c {
compatible = "silicon touch,vm149c";
status = "okay";
reg = <0x0c>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
};
ov13850f: ov13850f@10 {
compatible = "ovti,ov13850";
status = "disabled";
reg = <0x10>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>; /* VCC28_MIPI */
//dovdd-supply = <&vcc_mipi>; /* VCC18_MIPI */
//dvdd-supply = <&dvdd_1v2>; /* DVDD_1V2 */
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,second-enabled-index = <1>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "CMK-CT0116";
rockchip,camera-module-lens-name = "Largan-50013A1";
lens-focus = <&vm149c_front>;
port {
ucam_out1: endpoint {
remote-endpoint = <&mipi_in_ucam1>;
data-lanes = <1 2>;
};
};
};
xc7160b: xc7160b@1b {
status = "disabled";
compatible = "firefly,xc7160";
reg = <0x1b>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>; /* VCC28_MIPI */
//dovdd-supply = <&vcc_mipi>; /* VCC18_MIPI */
//dvdd-supply = <&dvdd_1v2>; /* DVDD_1V2 */
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
xc7160b_out: endpoint {
remote-endpoint = <&mipi_in_ucam2>;
data-lanes = <1 2 3 4>;
};
};
};
xc7160f: xc7160f@1b {
status = "disabled";
compatible = "firefly,xc7160";
reg = <0x1b>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>; /* VCC28_MIPI */
//dovdd-supply = <&vcc_mipi>; /* VCC18_MIPI */
//dvdd-supply = <&dvdd_1v2>; /* DVDD_1V2 */
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
xc7160f_out: endpoint {
remote-endpoint = <&mipi_in_ucam3>;
data-lanes = <1 2 3 4>;
};
};
};
XC6130b: XC6130b@23{
status = "disabled";
compatible = "firefly,xc7022";
reg = <0x23>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>;
reset-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
xc6130_out: endpoint {
remote-endpoint = <&mipi_in_ucam4>;
data-lanes = <1 2>;
};
};
};
XC7022b: XC7022b@1b{
status = "disabled";
compatible = "firefly,xc7022";
reg = <0x1b>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>;
reset-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
xc7022_out: endpoint {
remote-endpoint = <&mipi_in_ucam5>;
data-lanes = <1 2>;
};
};
};
};
修改为：
&i2c1 {
status = "okay";
i2c-scl-rising-time-ns = <300>;
i2c-scl-falling-time-ns = <15>;
clock-frequency = <400000>;
es8323: es8323@10 {
compatible = "everest,es8323";
reg = <0x10>;
spk-ctl-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
clock-names = "mclk";
clocks = <&cru SCLK_I2S_8CH_OUT>;
pinctrl-names = "default";
pinctrl-0 = <&i2s_8ch_mclk>;
#sound-dai-cells = <0>;
extcon = <&rk_headset>;
status = "disabled";
};
rt5640: rt5640@1c {
#sound-dai-cells = <0>;
compatible = "realtek,rt5640";
reg = <0x1c>;
clocks = <&cru SCLK_I2S_8CH_OUT>;
clock-names = "mclk";
realtek,in1-differential;
pinctrl-names = "default";
pinctrl-0 = <&i2s_8ch_mclk>;
//hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
//hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
io-channels = <&saradc 4>;
hp-det-adc-value = <500>;
status = "okay";
};
gti5801: gti5801@60 {
compatible = "gyrfalcon,spr5801";
reg = <0x60>;
status = "disabled";
};
vm149c: vm149c@0c {
compatible = "silicon touch,vm149c";
status = "okay";
reg = <0x0c>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
};
ov13850: ov13850@10 {
compatible = "ovti,ov13850";
status = "okay";
reg = <0x10>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
/* avdd-supply = <>; */
/* dvdd-supply = <>; */
/* dovdd-supply = <>; */
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; // conflict with csi-ctl-gpios
pwdn-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-CT0116";
rockchip,camera-module-lens-name = "Largan-50013A1";
lens-focus = <&vm149c>;
//flash-leds = <&sgm3784_led0 &sgm3784_led1>;
port {
ucam_out0: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
//remote-endpoint = <&mipi_in_ucam1>;
data-lanes = <1 2>;
};
};
};
xc7160b: xc7160b@1b {
status = "disabled";
compatible = "firefly,xc7160";
reg = <0x1b>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>; /* VCC28_MIPI */
//dovdd-supply = <&vcc_mipi>; /* VCC18_MIPI */
//dvdd-supply = <&dvdd_1v2>; /* DVDD_1V2 */
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
xc7160b_out: endpoint {
remote-endpoint = <&mipi_in_ucam2>;
data-lanes = <1 2 3 4>;
};
};
};
xc7160f: xc7160f@1b {
status = "disabled";
compatible = "firefly,xc7160";
reg = <0x1b>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>; /* VCC28_MIPI */
//dovdd-supply = <&vcc_mipi>; /* VCC18_MIPI */
//dvdd-supply = <&dvdd_1v2>; /* DVDD_1V2 */
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
xc7160f_out: endpoint {
remote-endpoint = <&mipi_in_ucam3>;
data-lanes = <1 2 3 4>;
};
};
};
XC6130b: XC6130b@23{
status = "disabled";
compatible = "firefly,xc7022";
reg = <0x23>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>;
reset-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
xc6130_out: endpoint {
remote-endpoint = <&mipi_in_ucam4>;
data-lanes = <1 2>;
};
};
};
XC7022b: XC7022b@1b{
status = "disabled";
compatible = "firefly,xc7022";
reg = <0x1b>;
clocks = <&cru SCLK_CIF_OUT>;
clock-names = "xvclk";
//avdd-supply = <&vcc_mipi>;
reset-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&cif_clkout>;
firefly,clkout-enabled-index = <0>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
xc7022_out: endpoint {
remote-endpoint = <&mipi_in_ucam5>;
data-lanes = <1 2>;
};
};
};
};
N:\AIO-3399J\11\OV13850\64rk3399-android-11\kernel\arch\arm64\boot\dts\rockchip\rk3399-firefly-port.dtsi
&mipi_dphy_rx0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&ucam_out0>;
data-lanes = <1 2>;
};
mipi_in_ucam2: endpoint@2 {
reg = <2>;
remote-endpoint = <&xc7160b_out>;
data-lanes = <1 2 3 4>;
};
mipi_in_ucam4: endpoint@3 {
reg = <3>;
remote-endpoint = <&xc6130_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dphy_rx0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0_mipi_in>;
};
};
};
};
&mipi_dphy_tx1rx1 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_ucam1: endpoint@1 {
reg = <1>;
remote-endpoint = <&ucam_out1>;
data-lanes = <1 2>;
};
mipi_in_ucam3: endpoint@2 {
reg = <2>;
remote-endpoint = <&xc7160f_out>;
data-lanes = <1 2 3 4>;
};
mipi_in_ucam5: endpoint@3 {
reg = <3>;
remote-endpoint = <&xc7022_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dphy_tx1rx1_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp1_mipi_in>;
};
};
};
};
修改为：
&mipi_dphy_rx0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&ucam_out0>;
data-lanes = <1 2>;
};
mipi_in_ucam2: endpoint@2 {
reg = <2>;
remote-endpoint = <&xc7160b_out>;
data-lanes = <1 2 3 4>;
};
mipi_in_ucam4: endpoint@3 {
reg = <3>;
remote-endpoint = <&xc6130_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dphy_rx0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0_mipi_in>;
};
};
};
};
&mipi_dphy_tx1rx1 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
//mipi_in_ucam1: endpoint@1 {
// reg = <1>;
// remote-endpoint = <&ucam_out1>;
// data-lanes = <1 2>;
//};
mipi_in_ucam3: endpoint@2 {
reg = <2>;
remote-endpoint = <&xc7160f_out>;
data-lanes = <1 2 3 4>;
};
mipi_in_ucam5: endpoint@3 {
reg = <3>;
remote-endpoint = <&xc7022_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dphy_tx1rx1_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp1_mipi_in>;
};
};
};
};
参考资料：
http://www.friendlyelec.com.cn/agent.asp
http://www.friendlyelec.com.cn/
https://download.friendlyelec.com/NanoPC-T4
https://wiki.friendlyelec.com/wiki/index.php/NanoPC-T4/zh#.E4.B8.8B.E8.BD.BDAndroid10.E6.BA.90.E4.BB.A3.E7.A0.81
https://item.taobao.com/item.htm?spm=a1z09.2.0.0.37562e8dcotDm6&id=570312633249&_u=7ju3ku004a
友善NanoPC-T4瑞芯微RK3399开发板ROS双摄4K播放开源AI智能安卓10
WiKi维基教程（固件介绍，使用说明，操作步骤等）
http://wiki.friendlyelec.com/wiki/index.php/NanoPC-T4
系统固件下载
https://dl.friendlyelec.com/nanopct4
原理图(pdf格式)
http://wiki.friendlyelec.com/wiki/images/e/e0/NanoPC-T4-1902-Schematic.pdf
尺寸图(dxf格式)
http://wiki.friendlyelec.com/wiki/images/b/bc/NanoPC-T4_1802_Drawing%28dxf%29.zip
http://www.friendlyelec.com.cn/nanopi-m4.asp
NanoPi M4 | NanoPi M4V2
https://wiki.friendlyelec.com/wiki/index.php/NanoPi_M4/zh
15.3 编译Android10源代码
15.3.1 下载Android10源代码
有以下两种途径获取 Android10 的源代码，都需要联网:
使用网盘里的git repo压缩包
网盘下载地址: 点击进入
https://download.friendlyelec.com/NanoPiM4
https://pan.baidu.com/share/init?surl=oBLn9H31hILJKEPQXgrUog
提取码：yn6r
