1 Device overview
1.1 Introduction
The AG32 family of 32-bit microcontrollers is designed to offer new degrees of freedom and rich compatible peripherals, and compatible pin and features to MCU users. AG32 product series offers supreme quality, stability, and exceptional pricing value.
1.1.1
RISC-V core with RV32IMAFC support
Up to 1 Mbyte of Flash memory
128KB SRAM
16KB instruction cache
1.1.2
3.0 V to 3.6 V application supply and I/Os
POR, PDR
4-to-26 MHz crystal oscillator
Internal 20MHz oscillator
32 kHz oscillator for RTC
Internal 40 kHz oscillator
1.1.3 Low-
Sleep, Stop and Standby modes
VBAT supply for RTC
1.1.4 ADC/DAC/CMP/DMA/Timers/GPIO
3×12-bit, 1.0 MSPS A/D converters: up to 16 channels and 3 MSPS in triple interleaved mode
2×10-bit D/A converters
Two rail-to-rail analog comparators
General-purpose DMA
Advanced-control timers
Up to 78 user I/O ports
1.1.5 communication Interface
I2C interfaces
UART interfaces
SPI interfaces
CAN interfaces
1.1.6 Others
Debug mode – Serial wire debug (SWD) & JTAG interfaces
USB 2.0 full-speed device/host controller with on-chip PHY
10/100 Ethernet MAC with dedicated DMA supports MII/RMII
RTC: subsecond accuracy
128-bit unique ID
1.2 Features and peripheral counts:
1.3 Chip architecture
3.1 Clock sources
Three different clock sources can be used to drive the system clock (SYSCLK):
(1) HSI oscillator clock
(2) HSE oscillator clock
(3) PLL clock
(4) Interconnect global clocks(FPGA Core)
The devices have the following two secondary clock sources:
(1) 40 kHz low speed internal RC (LSI), which drives the independent watchdog and optionally the RTC used for Auto-wakeup from Stop/Standby mode.
(2) 32.768 kHz low speed external crystal (LSE crystal), which optionally drives the real-time clock (RTCCLK)
Each clock source can be switched on or off independently when it is not used, to optimize power consumption.
核心Features：
内置2K CPLD逻辑单元，可当纯CPLD用，2K Luts；
如当纯MCU用，就跟ST完全 Pin to Pin；
性价比高；
工业级温度范围；
300M主频（实测）；
外设跟封装无关，即便是48Pin或者32Pin，也可以通过CPLD配置。这是目前为止同类厂商（含外资厂商）不具备的。
