FPGA引脚选择（Select IO）--认知1

主要考虑功能角度（速度，电平匹配，内部程序编写）去找研究芯片内部资源
1. 关键字
HP I/O Banks, High performance
The HP I/O banks are deisgned to meet the performance requirements of high-speed memory and other chip-to-chip interface with voltages up to 1.8V.
HR I/O Banks, High Range
The HR I/O banks are designed to support a wider range of I/O standards with voltages up to 3.3V
GTP: multi-gigabit serial transceivers (GTP or GTX)
SIO: SelectIO
Zynq-7000 AP SoC :
has a constant 128 pins dedicated to memory interfaces (DDR I/O), multiplexed peripherals
(MIO), and control. Programmable logic provides additional pins for SelectIO™ resources
(SIO) and multi-gigabit serial transceivers (GTP or GTX) that scale by device as well as fixed
pins for configuration and analog-to-digital conversion (XADC). SIO can be used to extend
the MIO to further leverage the fixed peripherals of the processing system (PS).


PS: Processing system, PL: Programmable logic
2. 高速, IO block

3. 低速, IO block
   
   

4. Bank
   4.1, In 7 series devices, an I/O bank consists of 50 IOBs. The number of banks depends upon the device size and the package pinout